A. The permanent loss of data due to system power fluctuations.
B. The extra time needed to fetch data from the slower main memory when it is not found in the cache.
C. The financial cost of manufacturing faster cache chips.
D. The reduction in processing speed when multiple applications compete for CPU space.
Answer: Option B
Solution (By JKSSB Mock Tests)
When the CPU looks for data in the cache and fails to find it (a cache miss), it suffers a time delay penalty because it must fetch that data from the slower system RAM.
Explanation:
SO-DIMM (Small Outline Dual In-line Memory Module) is a compact alternative to standard DIMMs, designed specifically for laptops and small form factor devices.
Explanation:
Memory latency is the time delay from when a memory access request is issued to when the data is available. It includes various delays like address decoding, access time, and bus latency.
Explanation:
A write buffer holds data to be written to memory, allowing the CPU to continue execution while the write operation completes asynchronously.
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