What type of data bus interface layout transfers all bits of a single data word concurrently across multiple parallel trace lines on a motherboard? MCQ with Answer and Explanation
Explanation:
Flash memory has a finite number of program/erase cycles, affecting SSD lifespan. It is non-volatile, faster than HDDs, and typically more expensive per GB.
Explanation:
A single DRAM memory cell consists of one transistor and one capacitor. The capacitor holds an electrical charge to represent a 1 or no charge to represent a 0.
Explanation:
Cache memory holds frequently accessed data and instructions to reduce the average time to access data from main memory, thus improving system performance.
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