Which memory metric describes the time interval between a memory controller issuing a command and the data becoming available on the output pins? MCQ with Answer and Explanation
Which memory metric describes the time interval between a memory controller issuing a command and the data becoming available on the output pins?
A. Clock Rate
B. Bandwidth
C. Refresh rate
D. CAS Latency
Answer: Option D
Solution (By JKSSB Mock Tests)
CAS (Column Address Strobe) Latency indicates the delay cycle count between an internal data request command and when the first bit of data is delivered.
Explanation:
An SSHD combines a traditional HDD with a small SSD cache to improve performance while offering large capacity at lower cost than pure SSD.
Explanation:
The TRIM command allows the operating system to notify the SSD about data blocks that are no longer considered in use, so the SSD can erase them during idle time, improving write performance and longevity.
No comments yet. Be the first to start the discussion!