Explanation:
DRAM is slower than SRAM because of refresh cycles, but it is cheaper and denser, making it suitable for main memory. It is volatile and uses capacitors.
Explanation:
ROM is non-volatile and its contents are typically fixed during manufacturing or programming; it cannot be changed by normal system operations.
Explanation:
The TLB is a dedicated hardware memory cache within the CPU's memory management unit (MMU) that speeds up virtual-to-physical address translations.
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