Cache line size is typically: MCQ with Answer and Explanation

Question

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Cache line size is typically:

A. 1024 bytes

B. 1 byte

C. 64 bytes

D. 8 bytes

Answer: Option C

Solution (By JKSSB Mock Tests)

Unit of transfer between cache levels.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1

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The Harvard architecture differs from von Neumann by having:

A. Slower processing

B. Shared memory only

C. Separate buses and memory for instructions and data

D. No registers

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Correct Answer: Option C

Explanation:
This allows simultaneous instruction fetch and data access.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

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The associativity of cache affects:

A. Core count

B. Clock speed

C. Hit rate and complexity

D. Voltage

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Correct Answer: Option C

Explanation:
Higher associativity reduces conflicts.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

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Which register is used to store the return address during subroutine calls?

A. Link Register

B. Program Counter

C. Accumulator

D. Flag Register

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Correct Answer: Option A

Explanation:
Link Register (in many architectures) holds the return address.

This question belongs to: Computer CPU (Central Processing Unit)

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