L3 cache is typically: MCQ with Answer and Explanation

Question

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L3 cache is typically:

A. Slower than registers but faster than RAM

B. Private to each core

C. Shared among all CPU cores

D. Used only for instructions

Answer: Option C

Solution (By JKSSB Mock Tests)

It acts as a larger shared cache layer.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1

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What does 'uop' stand for?

A. User operation

B. Ultra operation

C. Micro-operation

D. Unified operation

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Correct Answer: Option C

Explanation:
CISC instructions are decoded into micro-ops.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

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Error Correcting Code (ECC) memory is supported by some CPUs for:

A. Increasing speed

B. Audio

C. Graphics

D. Detecting and correcting memory errors

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Correct Answer: Option D

Explanation:
Important for servers and reliability.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

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The opcode fetch is part of:

A. Execution stage

B. Memory stage

C. Instruction fetch stage

D. Write-back stage

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Correct Answer: Option C

Explanation:
First step in processing an instruction.

This question belongs to: Computer CPU (Central Processing Unit)

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