The fetch-decode-execute cycle is also known as the: MCQ with Answer and Explanation

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The fetch-decode-execute cycle is also known as the:

A. Memory cycle

B. Data cycle

C. Control cycle

D. Instruction cycle

Answer: Option D

Solution (By JKSSB Mock Tests)

It represents the basic operational cycle of the CPU for processing instructions.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1

The architectural registers are:

A. Hidden physical only

B. Cache lines

C. Visible to software

D. Memory locations

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Correct Answer: Option C

Explanation:
Part of ISA.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

The front side bus (FSB) connects:

A. Registers internally

B. CPU to chipset/memory

C. GPU only

D. ALU to CU

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Correct Answer: Option B

Explanation:
It is the data pathway between processor and other components.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

Which of the following is an integrated component in many modern SoCs?

A. Monitor

B. CPU, GPU, NPU

C. Hard disk

D. Only CPU

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Correct Answer: Option B

Explanation:
System on Chip includes multiple processing units.

This question belongs to: Computer CPU (Central Processing Unit)

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