The front-end pipeline bottleneck often involves: MCQ with Answer and Explanation

Question

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The front-end pipeline bottleneck often involves:

A. Memory writes

B. Execution units

C. Retirement stage

D. Instruction fetch and decode bandwidth

Answer: Option D

Solution (By JKSSB Mock Tests)

It limits instruction supply.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1

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The coherence directory is used in:

A. Single core

B. Mobile only

C. Cache less designs

D. Large scale multi-core systems

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Correct Answer: Option D

Explanation:
For directory-based coherence.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

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Which is a key design goal for laptop CPUs?

A. Desktop level heat

B. Maximum TDP

C. Unlimited power

D. High performance within thermal and power limits

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Correct Answer: Option D

Explanation:
Balances battery and performance.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

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The instruction cache primarily stores:

A. Data operands

B. Addresses

C. Frequently used instructions

D. Results

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Correct Answer: Option C

Explanation:
To speed up fetch stage.

This question belongs to: Computer CPU (Central Processing Unit)

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