The Instruction Decode Queue (IDQ) holds: MCQ with Answer and Explanation

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The Instruction Decode Queue (IDQ) holds:

A. Memory addresses

B. Decoded micro-operations

C. Raw instructions

D. Results

Answer: Option B

Solution (By JKSSB Mock Tests)

It feeds the execution engine.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1

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The load queue manages:

A. Pending memory reads

B. Control

C. Writes only

D. ALU

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Correct Answer: Option A

Explanation:
For memory operations in pipeline.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

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Cache memory is placed between:

A. RAM and Hard Disk

B. Input and Output devices

C. ALU and CU

D. CPU and RAM

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Correct Answer: Option D

Explanation:
Cache provides faster access to frequently used data between CPU and main memory.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

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The load/store architecture restricts memory access to:

A. Dedicated load and store instructions

B. ALU only

C. Control unit

D. All instructions

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Correct Answer: Option A

Explanation:
Typical in RISC designs.

This question belongs to: Computer CPU (Central Processing Unit)

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