The Instruction Decode Queue (IDQ) holds: MCQ with Answer and Explanation

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The Instruction Decode Queue (IDQ) holds:

A. Raw instructions

B. Memory addresses

C. Decoded micro-operations

D. Results

Answer: Option C

Solution (By JKSSB Mock Tests)

It feeds the execution engine.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1

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The loop stream detector:

A. Detects cache misses

B. Handles branches

C. Manages power

D. Recognizes and optimizes small loops

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Correct Answer: Option D

Explanation:
Reduces front-end power.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

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Apple's Firestorm cores are part of:

A. GPU only

B. x86 processors

C. Server chips

D. M-series ARM-based CPUs

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Correct Answer: Option D

Explanation:
High performance mobile/desktop SoCs.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

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The retire stage in pipeline:

A. Executes only

B. Commits results of executed instructions

C. Decodes

D. Fetches

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Correct Answer: Option B

Explanation:
It ensures in-order completion where necessary.

This question belongs to: Computer CPU (Central Processing Unit)

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