The width of the data bus affects: MCQ with Answer and Explanation

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The width of the data bus affects:

A. How much data can be transferred at once

B. Instruction complexity

C. Addressable memory

D. Clock speed only

Answer: Option A

Solution (By JKSSB Mock Tests)

Wider bus allows more parallel data transfer.

This question belongs to: Computer CPU (Central Processing Unit)

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Practice More CPU (Central Processing Unit) Questions

Question #1

FMA instruction stands for:

A. Fused Multiply-Add

B. Fetch Memory Address

C. Fast Memory Access

D. Flag Management Algorithm

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Correct Answer: Option A

Explanation:
Performs multiplication and addition in one step.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2

Which is a benefit of smaller process nodes?

A. Higher leakage always

B. Larger chips

C. Lower power, higher density

D. Slower speeds

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Correct Answer: Option C

Explanation:
Improved efficiency and performance.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3

Which stage follows execution in classic pipeline?

A. Decode

B. Memory access and write-back

C. Issue

D. Fetch

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Correct Answer: Option B

Explanation:
Completes data operations.

This question belongs to: Computer CPU (Central Processing Unit)

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