Which level of cache memory is typically shared among multiple cores of a modern multi-core CPU architecture?
A. L3 Cache
B. L2 Cache
C. L0 Cache
D. L1 Cache
Answer: Option A
Solution (By JKSSB Mock Tests)
While L1 and L2 caches are generally dedicated to individual CPU cores, the L3 cache is larger, slightly slower, and shared across all cores on the processor die.
Explanation:
The memory bus (or front-side bus) is the data path that carries information between the CPU and the main memory (RAM). It determines the bandwidth and speed of data transfer.
Explanation:
The memory hierarchy is designed to provide a trade-off between speed (fast but expensive) and capacity (slow but cheap), optimizing overall system performance and cost.
No comments yet. Be the first to start the discussion!