Which memory location holds the addresses of various Interrupt Service Routines (ISRs) to handle specific hardware triggers? MCQ with Answer and Explanation
Which memory location holds the addresses of various Interrupt Service Routines (ISRs) to handle specific hardware triggers?
A. Process Control Block (PCB)
B. Virtual Swap Block
C. Windows Registry Base
D. Interrupt Vector Table (IVT)
Answer: Option D
Solution (By JKSSB Mock Tests)
The Interrupt Vector Table maps specific interrupt signal identifier numbers directly to the memory locations of their respective Interrupt Service Routines.
Explanation:
SMP distributes operating system overhead and user execution dynamically across all available peer processors, eliminating master-slave bottlenecks.
No comments yet. Be the first to start the discussion!