CPU (Central Processing Unit) MCQs

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CPU (Central Processing Unit) MCQs

Practice CPU MCQs with answers and explanations covering ALU, CU, registers, processors and central processing unit concepts frequently asked in competitive exams.

327
Total Questions

Practice Questions

Page 9 of 17
Question #161
The dispatch buffer holds:
A. Instructions ready for execution
B. Addresses only
C. Fetched but not decoded
D. Committed results
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Correct Answer: Option A

Explanation:
In out-of-order processors.
This question belongs to: Computer CPU (Central Processing Unit)
Question #162
Heterogeneous System Architecture (HSA) promotes:
A. Seamless CPU-GPU integration
B. Software incompatibility
C. No sharing
D. Separation of units
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Correct Answer: Option A

Explanation:
Unified memory and programming.
This question belongs to: Computer CPU (Central Processing Unit)
Question #163
A high core count CPU is best for:
A. No applications
B. Basic office work exclusively
C. Highly parallel workloads like rendering
D. Single threaded games only
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Correct Answer: Option C

Explanation:
Scales with thread-heavy tasks.
This question belongs to: Computer CPU (Central Processing Unit)
Question #164
The predictor in branch prediction can be:
A. Only hardware
B. No predictor
C. Software irrelevant
D. Static or dynamic
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Correct Answer: Option D

Explanation:
Dynamic uses history for accuracy.
This question belongs to: Computer CPU (Central Processing Unit)
Question #165
Which company leads in discrete GPU but also makes CPUs?
A. Focus on one
B. None
C. NVIDIA has CPUs too but AMD/Intel primary
D. All do equally
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Correct Answer: Option C

Explanation:
AMD integrates well with Radeon.
This question belongs to: Computer CPU (Central Processing Unit)
Question #166
The store queue handles:
A. Fetches
B. Pending memory writes
C. ALU results
D. Decodes
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Correct Answer: Option B

Explanation:
For memory ordering.
This question belongs to: Computer CPU (Central Processing Unit)
Question #167
Advanced topics in 2026 CPU include more emphasis on:
A. Ignoring heat
B. Analog signals
C. Basic functions only
D. Sustainability, AI, and security
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Correct Answer: Option D

Explanation:
Modern design priorities.
This question belongs to: Computer CPU (Central Processing Unit)
Question #168
The front-end of CPU pipeline includes:
A. Fetch and decode
B. Memory access
C. Writeback
D. Execute only
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Correct Answer: Option A

Explanation:
Prepares instructions for execution.
This question belongs to: Computer CPU (Central Processing Unit)
Question #169
Back-end focuses on:
A. Execution and retirement
B. Fetching
C. Addressing
D. Decoding
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Correct Answer: Option A

Explanation:
Carrying out and completing instructions.
This question belongs to: Computer CPU (Central Processing Unit)
Question #170
Which is critical for cloud computing CPUs?
A. Gaming graphics
B. Consumer features
C. Low core count
D. High density, security, and virtualization support
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Correct Answer: Option D

Explanation:
Optimized for multi-tenant environments.
This question belongs to: Computer CPU (Central Processing Unit)
Question #171
The load queue manages:
A. Writes only
B. ALU
C. Control
D. Pending memory reads
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Correct Answer: Option D

Explanation:
For memory operations in pipeline.
This question belongs to: Computer CPU (Central Processing Unit)
Question #172
Monolithic die vs chiplet trade-off is in:
A. No difference
B. Only size
C. Performance, cost, and yield
D. Power irrelevant
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Correct Answer: Option C

Explanation:
Chiplets offer scalability.
This question belongs to: Computer CPU (Central Processing Unit)
Question #173
Which feature helps in side-channel attack mitigation?
A. Hardware security enhancements
B. More registers
C. Higher clock
D. Larger cache
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Correct Answer: Option A

Explanation:
Constant time operations and isolation.
This question belongs to: Computer CPU (Central Processing Unit)
Question #174
The retirement rate depends on:
A. Input devices
B. Memory size
C. External bus
D. Pipeline width and dependencies
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Correct Answer: Option D

Explanation:
How quickly instructions complete.
This question belongs to: Computer CPU (Central Processing Unit)
Question #175
Upcoming CPUs focus on:
A. Energy efficiency and specialized accelerators
B. Slower speeds
C. Basic design
D. Ignoring AI
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Correct Answer: Option A

Explanation:
To meet demands of modern computing.
This question belongs to: Computer CPU (Central Processing Unit)
Question #176
The shadow registers or checkpointing is for:
A. Normal operations
B. Storage
C. Speculative execution recovery
D. Display
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Correct Answer: Option C

Explanation:
To rollback on mis-speculation.
This question belongs to: Computer CPU (Central Processing Unit)
Question #177
Which is a key metric for laptop CPUs?
A. Core count irrelevant
B. Maximum TDP only
C. Size of packaging
D. Performance per watt and thermal envelope
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Correct Answer: Option D

Explanation:
Balances performance and battery life.
This question belongs to: Computer CPU (Central Processing Unit)
Question #178
The von Neumann bottleneck primarily refers to:
A. Control unit delays
B. Register access time
C. Limited memory bandwidth between CPU and memory
D. ALU processing speed
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Correct Answer: Option C

Explanation:
The shared bus for data and instructions limits throughput in von Neumann architecture.
This question belongs to: Computer CPU (Central Processing Unit)
Question #179
In CPU design, 'IPC' stands for:
A. Internal Processing Cache
B. Integrated Power Control
C. Interrupt Priority Controller
D. Instructions Per Cycle
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Correct Answer: Option D

Explanation:
IPC measures how many instructions a CPU executes per clock cycle.
This question belongs to: Computer CPU (Central Processing Unit)
Question #180
Which register is used to store the return address during subroutine calls?
A. Program Counter
B. Link Register
C. Accumulator
D. Flag Register
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Correct Answer: Option B

Explanation:
Link Register (in many architectures) holds the return address.
This question belongs to: Computer CPU (Central Processing Unit)

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