CPU (Central Processing Unit) MCQs

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CPU (Central Processing Unit) MCQs

Practice CPU MCQs with answers and explanations covering ALU, CU, registers, processors and central processing unit concepts frequently asked in competitive exams.

327
Total Questions

Practice Questions

Page 11 of 17
Question #201
AVX-512 refers to:
A. Power management
B. Cache level
C. Core count
D. 512-bit vector instruction extensions
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Correct Answer: Option D

Explanation:
It enables wider SIMD operations.
This question belongs to: Computer CPU (Central Processing Unit)
Question #202
The Program Status Word (PSW) contains:
A. Memory map
B. Data operands
C. Instruction address only
D. Condition codes and status information
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Correct Answer: Option D

Explanation:
It holds processor state.
This question belongs to: Computer CPU (Central Processing Unit)
Question #203
Dynamic frequency scaling is also known as:
A. CPU throttling or DVFS
B. Underclocking only
C. Static speed
D. Overclocking
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Correct Answer: Option A

Explanation:
It adjusts frequency based on workload.
This question belongs to: Computer CPU (Central Processing Unit)
Question #204
In CPU, 'retirement' refers to:
A. Fetching instructions
B. Committing instruction results to architectural state
C. Memory access
D. Decoding phase
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Correct Answer: Option B

Explanation:
It completes the instruction lifecycle.
This question belongs to: Computer CPU (Central Processing Unit)
Question #205
The MESI protocol is used for:
A. ALU operations
B. Cache coherence
C. Power gating
D. Instruction fetch
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Correct Answer: Option B

Explanation:
Modified, Exclusive, Shared, Invalid states.
This question belongs to: Computer CPU (Central Processing Unit)
Question #206
Which is a characteristic of ARM processors?
A. CISC architecture
B. Limited to servers
C. High power consumption desktops
D. Energy efficiency for mobile devices
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Correct Answer: Option D

Explanation:
They dominate mobile and embedded markets.
This question belongs to: Computer CPU (Central Processing Unit)
Question #207
The reorder buffer enables:
A. In-order commit with out-of-order execution
B. Reduced registers
C. No speculation
D. In-order execution only
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Correct Answer: Option A

Explanation:
It maintains program order.
This question belongs to: Computer CPU (Central Processing Unit)
Question #208
What does 'uop' stand for?
A. User operation
B. Unified operation
C. Ultra operation
D. Micro-operation
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Correct Answer: Option D

Explanation:
CISC instructions are decoded into micro-ops.
This question belongs to: Computer CPU (Central Processing Unit)
Question #209
Thermal throttling occurs when CPU:
A. Overclocks automatically
B. Shuts down completely
C. Increases voltage
D. Reduces frequency to prevent overheating
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Correct Answer: Option D

Explanation:
It protects hardware from damage.
This question belongs to: Computer CPU (Central Processing Unit)
Question #210
The Instruction Decode Queue (IDQ) holds:
A. Decoded micro-operations
B. Results
C. Memory addresses
D. Raw instructions
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Correct Answer: Option A

Explanation:
It feeds the execution engine.
This question belongs to: Computer CPU (Central Processing Unit)
Question #211
x86-64 is also known as:
A. AMD64 or Intel 64
B. RISC-V
C. MIPS64
D. ARM64
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Correct Answer: Option A

Explanation:
It is the 64-bit extension of x86.
This question belongs to: Computer CPU (Central Processing Unit)
Question #212
Prefetching in CPU aims to:
A. Increase power usage
B. Slow down execution
C. Reduce cache misses by loading data early
D. Limit registers
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Correct Answer: Option C

Explanation:
Hardware or software prefetchers anticipate needs.
This question belongs to: Computer CPU (Central Processing Unit)
Question #213
Which register points to the current stack location?
A. Stack Pointer
B. Base Pointer
C. Index Register
D. Program Counter
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Correct Answer: Option A

Explanation:
It manages stack operations like push/pop.
This question belongs to: Computer CPU (Central Processing Unit)
Question #214
Heterogeneous computing typically combines:
A. Only identical cores
B. CPU and GPU or specialized accelerators
C. Software layers
D. Memory modules
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Correct Answer: Option B

Explanation:
It optimizes different workloads.
This question belongs to: Computer CPU (Central Processing Unit)
Question #215
The latency of register access is:
A. Same as main memory
B. 1 clock cycle or less
C. Hundreds of cycles
D. Variable by design
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Correct Answer: Option B

Explanation:
Registers are the fastest storage.
This question belongs to: Computer CPU (Central Processing Unit)
Question #216
Zen 5 is an example of:
A. GPU architecture
B. Intel design
C. ARM core
D. AMD CPU microarchitecture
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Correct Answer: Option D

Explanation:
It powers recent Ryzen processors.
This question belongs to: Computer CPU (Central Processing Unit)
Question #217
Speculative execution can lead to:
A. No side effects
B. Always secure processing
C. Security vulnerabilities like Spectre
D. Reduced performance
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Correct Answer: Option C

Explanation:
It requires mitigations for information leaks.
This question belongs to: Computer CPU (Central Processing Unit)
Question #218
The front-end pipeline bottleneck often involves:
A. Retirement stage
B. Instruction fetch and decode bandwidth
C. Execution units
D. Memory writes
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Correct Answer: Option B

Explanation:
It limits instruction supply.
This question belongs to: Computer CPU (Central Processing Unit)
Question #219
Power gating technique turns off:
A. ALU permanently
B. Cache only
C. All cores simultaneously
D. Unused circuit blocks to save leakage power
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Correct Answer: Option D

Explanation:
It improves energy efficiency.
This question belongs to: Computer CPU (Central Processing Unit)
Question #220
Which company introduced the first commercial microprocessor?
A. Motorola
B. AMD
C. IBM
D. Intel with 4004
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Correct Answer: Option D

Explanation:
In 1971.
This question belongs to: Computer CPU (Central Processing Unit)

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